Stefan Reinauer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45008 )
Change subject: util/intelp2m: Update macros ......................................................................
util/intelp2m: Update macros
Change-Id: Ia0a7dea89fdb69e01f0abe577488f26a5d2bd6ed Signed-off-by: Benjamin Doron benjamin.doron00@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45008 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Maxim Polyakov max.senia.poliak@gmail.com Reviewed-by: Stefan Reinauer stefan.reinauer@coreboot.org --- M util/intelp2m/platforms/snr/macro.go 1 file changed, 17 insertions(+), 15 deletions(-)
Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve Maxim Polyakov: Looks good to me, but someone else must approve
diff --git a/util/intelp2m/platforms/snr/macro.go b/util/intelp2m/platforms/snr/macro.go index 86cc7b7..43d373e 100644 --- a/util/intelp2m/platforms/snr/macro.go +++ b/util/intelp2m/platforms/snr/macro.go @@ -59,13 +59,13 @@ dw1 := macro.Register(PAD_CFG_DW1) var pull = map[uint8]string{ 0x0: "NONE", - 0x2: "5K_PD", - 0x4: "20K_PD", - 0x9: "1K_PU", - 0xa: "5K_PU", - 0xb: "2K_PU", - 0xc: "20K_PU", - 0xd: "667_PU", + 0x2: "DN_5K", + 0x4: "DN_20K", + 0x9: "UP_1K", + 0xa: "UP_5K", + 0xb: "UP_2K", + 0xc: "UP_20K", + 0xd: "UP_667", 0xf: "NATIVE", } str, valid := pull[dw1.GetTermination()] @@ -91,7 +91,9 @@ if dw0.GetRXLevelEdgeConfiguration() == common.TRIG_LEVEL { if dw0.GetRxInvert() != 0 { // PAD_CFG_GPI_APIC_INVERT(pad, pull, rst) - macro.Add("_INVERT") + macro.Add("_LOW") + } else { + macro.Add("_HIGH") } // PAD_CFG_GPI_APIC(pad, pull, rst) macro.Add("(").Id().Pull().Rstsrc().Add("),") @@ -121,16 +123,16 @@ if dw0.GetGPIOInputRouteSCI() == 0 { return false } + macro.Add("_SCI").Add("(").Id().Pull().Rstsrc() + if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 { + macro.Trig() + } // e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT), if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 { // e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES), // #define PAD_CFG_GPI_ACPI_SCI(pad, pull, rst, inv) \ // PAD_CFG_GPI_SCI(pad, pull, rst, EDGE_SINGLE, inv) - macro.Add("_ACPI") - } - macro.Add("_SCI").Add("(").Id().Pull().Rstsrc() - if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 { - macro.Trig() + macro.Add(",").Add("EDGE_SINGLE") } macro.Invert().Add("),") return true @@ -143,11 +145,11 @@ if dw0.GetGPIOInputRouteSMI() == 0 { return false } + macro.Add("_SMI").Add("(").Id().Pull().Rstsrc() if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 { // e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES), - macro.Add("_ACPI") + macro.Add(",").Add("EDGE_SINGLE") } - macro.Add("_SMI").Add("(").Id().Pull().Rstsrc() if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 { // e.g. PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, NONE), macro.Trig()