Hello Patrick Rudolph, build bot (Jenkins), David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36333
to look at the new patch set (#2).
Change subject: src/southbridge: change "unsigned" to "unsigned int" ......................................................................
src/southbridge: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth martin@coreboot.org Change-Id: Iee2056a50a1201626fa29194afdbfc1f11094420 --- M src/southbridge/amd/amd8111/acpi.c M src/southbridge/amd/amd8111/amd8111.c M src/southbridge/amd/amd8111/amd8111.h M src/southbridge/amd/amd8111/amd8111_smbus.h M src/southbridge/amd/amd8111/early_ctrl.c M src/southbridge/amd/amd8111/early_smbus.c M src/southbridge/amd/amd8111/reset.c M src/southbridge/amd/amd8132/bridge.c M src/southbridge/broadcom/bcm5785/bcm5785.c M src/southbridge/broadcom/bcm5785/bcm5785.h M src/southbridge/broadcom/bcm5785/early_setup.c M src/southbridge/broadcom/bcm5785/early_smbus.c M src/southbridge/broadcom/bcm5785/sb_pci_main.c M src/southbridge/broadcom/bcm5785/smbus.h M src/southbridge/intel/bd82x6x/early_smbus.c M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_8.x.c M src/southbridge/intel/bd82x6x/pch.c M src/southbridge/intel/bd82x6x/pch.h M src/southbridge/intel/bd82x6x/usb_ehci.c M src/southbridge/intel/common/gpio.c M src/southbridge/intel/common/gpio.h M src/southbridge/intel/common/spi.c M src/southbridge/intel/fsp_rangeley/early_smbus.c M src/southbridge/intel/fsp_rangeley/gpio.h M src/southbridge/intel/fsp_rangeley/soc.c M src/southbridge/intel/fsp_rangeley/spi.c M src/southbridge/intel/i82801dx/i82801dx.h M src/southbridge/intel/i82801ix/early_smbus.c M src/southbridge/intel/i82801ix/i82801ix.c M src/southbridge/intel/i82801ix/i82801ix.h M src/southbridge/intel/i82801ix/usb_ehci.c M src/southbridge/intel/i82801jx/early_smbus.c M src/southbridge/intel/i82801jx/i82801jx.h M src/southbridge/intel/i82801jx/usb_ehci.c M src/southbridge/intel/ibexpeak/early_smbus.c M src/southbridge/intel/ibexpeak/me.c M src/southbridge/intel/ibexpeak/pch.h M src/southbridge/intel/ibexpeak/usb_ehci.c M src/southbridge/intel/lynxpoint/early_smbus.c M src/southbridge/intel/lynxpoint/lp_gpio.c M src/southbridge/intel/lynxpoint/lp_gpio.h M src/southbridge/intel/lynxpoint/me_9.x.c M src/southbridge/intel/lynxpoint/pch.c M src/southbridge/intel/lynxpoint/pch.h M src/southbridge/intel/lynxpoint/pcie.c M src/southbridge/nvidia/ck804/ck804.c M src/southbridge/nvidia/ck804/ck804.h M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/ck804/early_smbus.c M src/southbridge/nvidia/ck804/early_smbus.h M src/southbridge/nvidia/ck804/fadt.c M src/southbridge/nvidia/ck804/lpc.c M src/southbridge/nvidia/ck804/sata.c M src/southbridge/nvidia/ck804/smbus.c M src/southbridge/nvidia/ck804/smbus.h M src/southbridge/nvidia/mcp55/early_ctrl.c M src/southbridge/nvidia/mcp55/early_setup_car.c M src/southbridge/nvidia/mcp55/early_smbus.c M src/southbridge/nvidia/mcp55/fadt.c M src/southbridge/nvidia/mcp55/mcp55.c M src/southbridge/nvidia/mcp55/mcp55.h M src/southbridge/nvidia/mcp55/nic.c M src/southbridge/nvidia/mcp55/smbus.c M src/southbridge/nvidia/mcp55/smbus.h M src/southbridge/ricoh/rl5c476/rl5c476.c M src/southbridge/ti/pci1x2x/pci1x2x.c 67 files changed, 256 insertions(+), 256 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/36333/2