[coreboot-gerrit] Change in coreboot[master]: arch/x86: Don't use .bss from car.ld if not running XIP

[Kyösti Mälkki (Code Review)]

Attention is currently required from: Furquan Shaikh, Arthur Heymans.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48156 )

Change subject: arch/x86: Don't use .bss from car.ld if not running XIP
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Patch Set 2:

(1 comment)

File src/arch/x86/assembly_entry.S:

https://review.coreboot.org/c/coreboot/+/48156/comment/f3423c80_5c680cae 
PS2, Line 39: #if ENV_STAGE_XIP
Remember non-car AMD write_resume_eip? It sort of suggests that for S3 resume path first stage would not be reloaded from SPI flash, but I am not sure.

If you create combined bootblock+romstage, S3 resume path will need to clear .bss.