Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31386 )
Change subject: soc/amd/stoneyridge: Expand 48MHz for both osc out signals
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Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/31386/2/src/soc/amd/stoneyridge/southbridge....
File src/soc/amd/stoneyridge/southbridge.c:
https://review.coreboot.org/#/c/31386/2/src/soc/amd/stoneyridge/southbridge....
PS2, Line 393: {
With the function name like this, it should really set the clock to 48MHz and not rely on previously set register value.
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