Hello Sudheer Amrabadi,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/49013
to review the following change.
Change subject: Standalone coreboot fix and qclib memlayout changes ......................................................................
Standalone coreboot fix and qclib memlayout changes
Change-Id: Ie477d7c17060c2c6b657cc55ab44a79312caec4a --- M src/soc/qualcomm/sc7280/memlayout.ld M src/soc/qualcomm/sc7280/qclib.c M src/soc/qualcomm/sc7280/qupv3_config.c 3 files changed, 13 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/49013/1
diff --git a/src/soc/qualcomm/sc7280/memlayout.ld b/src/soc/qualcomm/sc7280/memlayout.ld index fed3a72..2d6e207 100644 --- a/src/soc/qualcomm/sc7280/memlayout.ld +++ b/src/soc/qualcomm/sc7280/memlayout.ld @@ -40,11 +40,12 @@ REGION(qclib_serial_log, 0x14857000, 4K, 4K) REGION(ddr_information, 0x1485B000, 1K, 1K) FMAP_CACHE(0x1485B400, 2K) - REGION(dcb, 0x1485F000, 16K, 4K) - REGION(pmic, 0x14863000, 44K, 4K) - REGION(limits_cfg, 0x1486E000, 4K, 4K) - REGION(qclib, 0x1486F000, 596K, 4K) - BSRAM_END(0x14904000) + CBFS_MCACHE(0x1485BC00,8K) + REGION(dcb, 0x14875000, 32K, 4K) + REGION(pmic, 0x1487D000, 92K, 4K) + REGION(limits_cfg, 0x14894000, 4K, 4K) + REGION(qclib, 0x14895000, 748K, 4K) + BSRAM_END(0x14950000)
DRAM_START(0x80000000) /* Various hardware/software subsystems make use of this area */ diff --git a/src/soc/qualcomm/sc7280/qclib.c b/src/soc/qualcomm/sc7280/qclib.c old mode 100644 new mode 100755 index 6affc63..d1fca2f --- a/src/soc/qualcomm/sc7280/qclib.c +++ b/src/soc/qualcomm/sc7280/qclib.c @@ -12,15 +12,15 @@ ssize_t ssize;
/* Attempt to load PMICCFG Blob */ - size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/pmiccfg", - _pmic, REGION_SIZE(pmic), CBFS_TYPE_RAW); + size = cbfs_load(CONFIG_CBFS_PREFIX "/pmiccfg", + _pmic, REGION_SIZE(pmic)); if (!size) return -1; qclib_add_if_table_entry(QCLIB_TE_PMIC_SETTINGS, _pmic, size, 0);
/* Attempt to load DCB Blob */ - size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/dcb", - _dcb, REGION_SIZE(dcb), CBFS_TYPE_RAW); + size = cbfs_load(CONFIG_CBFS_PREFIX "/dcb", + _dcb, REGION_SIZE(dcb)); if (!size) return -1; qclib_add_if_table_entry(QCLIB_TE_DCB_SETTINGS, _dcb, size, 0); diff --git a/src/soc/qualcomm/sc7280/qupv3_config.c b/src/soc/qualcomm/sc7280/qupv3_config.c old mode 100644 new mode 100755 index 3dbe3e6..66b1534 --- a/src/soc/qualcomm/sc7280/qupv3_config.c +++ b/src/soc/qualcomm/sc7280/qupv3_config.c @@ -26,10 +26,10 @@ die("*ERROR* * INVALID PROTOCOL ***\n");
if (!fw_list[protocol]) { - fw_list[protocol] = cbfs_boot_map_with_leak(filename[protocol], - CBFS_TYPE_RAW, NULL); + fw_list[protocol] = cbfs_map(filename[protocol], + NULL); if (!fw_list[protocol]) - die("*ERROR* * cbfs_boot_map_with_leak failed ***\n"); + die("*ERROR* * cbfs_map() failed ***\n"); }
hdr = fw_list[protocol];