Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35516 )
Change subject: device/pci: Ensure full 16-bit VGA port i/o decoding ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35516/1/src/device/device.c File src/device/device.c:
https://review.coreboot.org/c/coreboot/+/35516/1/src/device/device.c@403 PS1, Line 403: The legacy PCI decodes : * only 10 bits, uses 0x100 - 0x3ff.
This comment suggests that there is more lurking than the ISA thing. […]
I wonder if the comment was supposed to say 'legacy ISA' decodes only 10 bits? Then, if ge bo back to pre-LPC chipsets where ISA signals were actually present on "southbridge" device, aliasing problems could have appeared there? Even if PCI-to-ISA-bridge was in subtractive decode mode, PCI resources would still have precedence (on PIIX4)?
https://www.intel.com/Assets/PDF/datasheet/290562.pdf (PIIX4 data)
And you can find some vintage horrors apparently depending on this aliasing:
http://www.vcfed.org/forum/showthread.php?34938-PC-ISA-I-O-Address-Space-10-...
https://review.coreboot.org/c/coreboot/+/35516/1/src/device/device.c@417 PS1, Line 417: }
The `else if` branch is dead. For `(base >= 0x3b0) && (base <= 0x3df)`, […]
Well.. it only took 16 years to notice?
commit bbb6d102 Date: Mon Aug 4 19:54:48 2003 +0000
Maybe we can get someone to test on asus/p2b with this 10-bit aliasing "fix" removed. But if we trust datasheet, integrated logic decodes 16-bits. So one would need some ill-behaving ISA add-on card too...