[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/braswell: Add support for FSP MR2

[Frans Hendriks (Code Review)]

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29661 )

Change subject: soc/intel/braswell: Add support for FSP MR2
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Patch Set 5:

(1 comment)
> Patch Set 5:
> > why not use 3rdparty/fsp for all non chrome devices and just keep the files in vendorcode/intel for the use by google.
>
> that sounds like the ideal solution to me

Different possibles to implement:
1. this patch, use CONFIG value to select MR1 or MR2.
2. Add MR2 ID and version ID. Modify find_fs() to support 2 FSP IDs. 
3. Use 3rdparty include file. Usage of 'old non MR2 fields should be moved to 'Braswell' mainboards.

Sounds like implementing solution 3?

https://review.coreboot.org/#/c/29661/5/src/vendorcode/intel/fsp/fsp1_1/bras... 
File src/vendorcode/intel/fsp/fsp1_1/braswell/FspUpdVpd.h:

https://review.coreboot.org/#/c/29661/5/src/vendorcode/intel/fsp/fsp1_1/bras... 
PS5, Line 566: /** Offset 0x02FE
> this change is unguarded - is the currently listed offset incorrect for both MR2 and Google FSP?

Yes. Just correction of the comment.