Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27992
Change subject: soc/intel/apollolake: Get rid of cnvi.asl ......................................................................
soc/intel/apollolake: Get rid of cnvi.asl
There is no need to add a special cnvi.asl file for the CNVi device. This can be handled by drivers/intel/wifi just like a PCIe WiFi device. This change gets rid of the cnvi.asl file and its usage in southbridge.asl file.
BUG=b:112371978
Change-Id: I0b798cdd430768730b7ada61ca4cb1f63c2a4229 Signed-off-by: Furquan Shaikh furquan@google.com --- D src/soc/intel/apollolake/acpi/cnvi.asl M src/soc/intel/apollolake/acpi/southbridge.asl 2 files changed, 0 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/27992/1
diff --git a/src/soc/intel/apollolake/acpi/cnvi.asl b/src/soc/intel/apollolake/acpi/cnvi.asl deleted file mode 100644 index a4d255d..0000000 --- a/src/soc/intel/apollolake/acpi/cnvi.asl +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* CNVi Controller 0:C.0 */ -Device (CNVI) { - Name(_ADR, 0x000C0000) - - Name (_S3D, 3) /* D3 supported in S3 */ - Name (_S0W, 3) /* D3 can wake device in S0 */ - Name (_S3W, 3) /* D3 can wake system from S3 */ - - Name (_PRW, Package() { GPE0A_CNVI_PME_STS, 3 }) - - Method (_STA, 0) - { - Return (0xF) - } -} diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl index 9f14db4..799778b 100644 --- a/src/soc/intel/apollolake/acpi/southbridge.asl +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -47,10 +47,4 @@ /* SGX */ #if IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX) #include <soc/intel/common/acpi/sgx.asl> - -/* CNVi */ -#if IS_ENABLED(CONFIG_SOC_INTEL_GLK) -#include "cnvi.asl" -#endif - #endif