Philipp Hug has uploaded this change for review. ( https://review.coreboot.org/28584
Change subject: soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation ......................................................................
soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation
After changing clock from 33.33Mhz to 1Ghz the UART divisor needs to be recalculated. Return correct tlck frequency in uart_platform_refclk.
Change-Id: I2291e4198cf466a8334211c6c46bc3268fc979a9 --- M src/soc/sifive/fu540/uart.c 1 file changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/28584/1
diff --git a/src/soc/sifive/fu540/uart.c b/src/soc/sifive/fu540/uart.c index c53f42d..b563be1 100644 --- a/src/soc/sifive/fu540/uart.c +++ b/src/soc/sifive/fu540/uart.c @@ -13,8 +13,11 @@ * GNU General Public License for more details. */
+#include <stddef.h> +#include <stdint.h> #include <console/uart.h> #include <soc/addressmap.h> +#include <soc/clock.h>
uintptr_t uart_platform_base(int idx) { @@ -29,5 +32,9 @@ /* * The SiFive UART uses tlclk, which is coreclk/2 as input */ - return 33330000 / 2; + + if (ENV_BOOTBLOCK) + return 33330000 / 2; + else + return clock_get_coreclk_khz() * KHz / 2; }