Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46707 )
Change subject: soc/intel/broadwell: Inline CPUID helpers ......................................................................
soc/intel/broadwell: Inline CPUID helpers
These functions are small and used in various stages. Inline them.
Change-Id: I0d15012f264dbb0ae2eff8210f79176b350b6e7f Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/broadwell/cpu_info.c M src/soc/intel/broadwell/include/soc/cpu.h M src/soc/intel/broadwell/romstage/cpu.c 3 files changed, 12 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46707/1
diff --git a/src/soc/intel/broadwell/cpu_info.c b/src/soc/intel/broadwell/cpu_info.c index 506b1a7..8814a48 100644 --- a/src/soc/intel/broadwell/cpu_info.c +++ b/src/soc/intel/broadwell/cpu_info.c @@ -5,16 +5,6 @@ #include <soc/msr.h> #include <soc/systemagent.h>
-u32 cpu_family_model(void) -{ - return cpuid_eax(1) & 0x0fff0ff0; -} - -u32 cpu_stepping(void) -{ - return cpuid_eax(1) & 0xf; -} - /* Dynamically determine if the part is ULT. */ int cpu_is_ult(void) { diff --git a/src/soc/intel/broadwell/include/soc/cpu.h b/src/soc/intel/broadwell/include/soc/cpu.h index 9167736..17eed4b 100644 --- a/src/soc/intel/broadwell/include/soc/cpu.h +++ b/src/soc/intel/broadwell/include/soc/cpu.h @@ -3,7 +3,9 @@ #ifndef _BROADWELL_CPU_H_ #define _BROADWELL_CPU_H_
+#include <arch/cpu.h> #include <device/device.h> +#include <stdint.h>
/* CPU types */ #define HASWELL_FAMILY_ULT 0x40650 @@ -38,8 +40,16 @@ (IRTL_1024_NS >> 10))
/* CPU identification */ -u32 cpu_family_model(void); -u32 cpu_stepping(void); +static inline u32 cpu_family_model(void) +{ + return cpuid_eax(1) & 0x0fff0ff0; +} + +static inline u32 cpu_stepping(void) +{ + return cpuid_eax(1) & 0xf; +} + int cpu_is_ult(void);
#endif diff --git a/src/soc/intel/broadwell/romstage/cpu.c b/src/soc/intel/broadwell/romstage/cpu.c index 7364876..c9f70a8 100644 --- a/src/soc/intel/broadwell/romstage/cpu.c +++ b/src/soc/intel/broadwell/romstage/cpu.c @@ -7,11 +7,6 @@ #include <soc/msr.h> #include <soc/romstage.h>
-u32 cpu_family_model(void) -{ - return cpuid_eax(1) & 0x0fff0ff0; -} - void set_max_freq(void) { msr_t msr, perf_ctl, platform_info;