Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34514 )
Change subject: mb/google/hatch: Enable chipset_lockdown coreboot config for hatch
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Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34514/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/34514/1//COMMIT_MSG@9
PS1, Line 9: lockdown configuration
What happened to SpiFlashCfgLockDown? Is it done by default always by FSP now?
yes, looks like FSP is setting DLOCK and FLOCK by its own for CML FSP without honoring dedicated FSP UPD.
Also, can PchLockDownGlobalSmi and PchLockDownRtcLock be set to 0 if CHIPSET_LOCKDOWN_COREBOOT is set instead of having 2 chip configs for those?
yes, thats better
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ia6dc90156dc76fde490b25cf833da3cf80f664f2
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