[coreboot-gerrit] Patch set updated for coreboot: e094244 AMD AGESA: Add missing breaks to switch statement in one file

[Bruce Griffith]

Bruce Griffith ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3839

-gerrit

commit e094244dbb88595ddfab8e03d31f2f215b729ea3
Author: Bruce Griffith 
Date:   Tue Jun 25 14:14:14 2013 -0600

AMD AGESA: Add missing breaks to switch statement in one file

This is the same patch as an earlier one applied to family 15 [1].

Static analysis often flags case statements that do not include
    a terminating "break;" statement. Eclipse's CODAN is an example
    of this.  This changelist modifies amdlib.c to terminate
    case statements with "break;".

[1] e44a89f amd/agesa/f15/Lib/amdlib.c: Add missing breaks ...

Change-Id: Ibd1ae6f2b52fde07de3d978d174975f4d93647ab
    Signed-off-by: Bruce Griffith 
---
 src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c
index 67078a3..99a28b1 100644
--- a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c
+++ b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c
@@ -297,6 +297,7 @@ LibAmdReadCpuReg (
       break;
     default:
       *Value = -1;
+      break;
   }
 }
 VOID
@@ -325,7 +326,7 @@ LibAmdWriteCpuReg (
       __writedr (7, Value);
       break;
     default:
-      ;
+      break;
   }
 }
 VOID
@@ -504,6 +505,7 @@ LibAmdIoRead (
     break;
   default:
     ASSERT (FALSE);
+    break;
   }
 }

@@ -541,6 +543,7 @@ LibAmdIoWrite (
     break;
   default:
     ASSERT (FALSE);
+    break;
   }
 }

@@ -641,6 +644,7 @@ LibAmdMemRead (
     break;
   default:
     ASSERT (FALSE);
+    break;
   }
 }

@@ -679,6 +683,7 @@ LibAmdMemWrite (
     break;
   default:
     ASSERT (FALSE);
+    break;
   }
 }
 /*---------------------------------------------------------------------------------------*/
@@ -1297,6 +1302,7 @@ LibAmdGetDataFromPtr (
     break;
   default:
     IDS_ERROR_TRAP;
+    break;
   }
 }

@@ -1336,6 +1342,7 @@ LibAmdAccessWidth (
   default:
     Width = 0;
     IDS_ERROR_TRAP;
+    break;
   }
   return Width;
 }