Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37351 )
Change subject: AGESA,binaryPI: Fix stack location on entry to romstage ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37351/1/src/drivers/amd/agesa/cache... File src/drivers/amd/agesa/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/37351/1/src/drivers/amd/agesa/cache... PS1, Line 46: mov $LAPIC_BASE_MSR, %ecx
Shouldn't SOC_AMD_COMMON_BLOCK_CAR have the same fix? Arthur already pointed that in my previous pat […]
SilverBack/AMD showed no interest to fix it for several months now. I believe I identified moving the sback might break their car.ld layout, so their production branch (read-only bootblocks) could not adopt the change.
The implementation in soc/amd relies on (undocumented) modifications to vendorcode so I am just ignoring SOC_AMD_COMMON_BLOCK_CAR. Not sure how we are going to deal with AP CAR teardowns :/.