[coreboot-gerrit] [XS] Change in coreboot[main]: soc/mediatek/mt8196: Add RTC read/write support in ramstage

[Jarried Lin (Code Review)]

Jarried Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86155?usp=email )

Change subject: soc/mediatek/mt8196: Add RTC read/write support in ramstage
......................................................................

soc/mediatek/mt8196: Add RTC read/write support in ramstage

Add support for RTC in ramstage to avoid mt6685 assertion when Coreboot
uses rtc_get.

BUG=b:317009620
TEST=Build pass, boot successfully, boot log show:
[INFO ]  [mt6685_init_pmif_arb]CHIP ID = 0x85

Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af
Signed-off-by: Jarried Lin 
---
M src/soc/mediatek/mt8196/soc.c
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/86155/1

diff --git a/src/soc/mediatek/mt8196/soc.c b/src/soc/mediatek/mt8196/soc.c
index 1636f29..333af61 100644
--- a/src/soc/mediatek/mt8196/soc.c
+++ b/src/soc/mediatek/mt8196/soc.c
@@ -8,6 +8,7 @@
 #include <soc/gpueb.h>
 #include <soc/mcupm.h>
 #include <soc/mmu_operations.h>
+#include <soc/mt6685.h>
 #include <soc/mtk_fsp.h>
 #include <soc/pcie.h>
 #include <soc/sspm.h>