[coreboot-gerrit] Change in coreboot[master]: arch/x86: Add <arch/romstage.h>

[Kyösti Mälkki (Code Review)]

Hello Patrick Rudolph, build bot (Jenkins), Damien Zammit,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/34911

to look at the new patch set (#2).

Change subject: arch/x86: Add <arch/romstage.h>
......................................................................

arch/x86: Add <arch/romstage.h>

Start with moving all postcar_frame related function
declarations here from <arch/cpu.h>.

Change-Id: I9aeef07f9009e44cc08927c85fe1862edf5c70dc
Signed-off-by: Kyösti Mälkki 
---
M src/arch/x86/include/arch/cpu.h
A src/arch/x86/include/arch/romstage.h
M src/arch/x86/postcar.c
M src/arch/x86/postcar_loader.c
M src/cpu/intel/car/romstage.c
M src/drivers/amd/agesa/mtrr_fixme.c
M src/drivers/intel/fsp2_0/temp_ram_exit.c
M src/include/cpu/intel/romstage.h
M src/northbridge/amd/agesa/agesa_helper.h
M src/northbridge/intel/e7505/memmap.c
M src/northbridge/intel/gm45/memmap.c
M src/northbridge/intel/haswell/memmap.c
M src/northbridge/intel/i440bx/memmap.c
M src/northbridge/intel/i945/memmap.c
M src/northbridge/intel/nehalem/memmap.c
M src/northbridge/intel/pineview/memmap.c
M src/northbridge/intel/sandybridge/memmap.c
M src/northbridge/intel/x4x/memmap.c
M src/soc/amd/picasso/romstage.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/intel/baytrail/romstage/romstage.c
M src/soc/intel/broadwell/romstage/romstage.c
22 files changed, 102 insertions(+), 79 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/34911/2