Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40245 )
Change subject: mainboard/volteer: Update Aux settings for Port 0
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Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40245/5/src/mainboard/google/voltee...
File src/mainboard/google/volteer/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/40245/5/src/mainboard/google/voltee...
PS5, Line 242: /* E22 : DDPA_CTRLCLK ==> USB_C1_AUXP_DC: Retimer FW drives this pin */
: PAD_NC(GPP_E22, NONE),
: /* E23 : DDPA_CTRLDATA ==> USB_C1_AUXN_DC: Retimer FW drives this pin */
: PAD_NC(GPP_E23, NONE),
don't these need to be NF6 as well? […]
If these are set to NF6 they will be SOC controlled instead of Retimer controller. The GPIO only needs to be set to NF6 in cases where there is no retimer as specified in https://docs.google.com/document/d/1nhWN1rzMFXBOb6XVSvQeNwPanKTq_Iai_kLdKfFi...
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