[coreboot-gerrit] Change in coreboot[master]: soc/intel/baytrail: Don't reinitialize SPI after lockdown

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36008 )

Change subject: soc/intel/baytrail: Don't reinitialize SPI after lockdown
......................................................................

soc/intel/baytrail: Don't reinitialize SPI after lockdown

With the common southbridge SPI code reinitialization after lockdown
is not necessary, hence the SMM finalize call becomes a no-op.

Change-Id: Ie73a0adc120731d541a772e09f3482902771b9eb
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36008
Reviewed-by: Nico Huber 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/baytrail/smihandler.c
M src/soc/intel/baytrail/southcluster.c
2 files changed, 0 insertions(+), 23 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c
index 16e2d95..2a92cb9 100644
--- a/src/soc/intel/baytrail/smihandler.c
+++ b/src/soc/intel/baytrail/smihandler.c
@@ -229,22 +229,6 @@
    *ret = gsmi_exec(sub_command, param);
 }

-static void finalize(void)
-{
-	static int finalize_done;
-
-	if (finalize_done) {
-		printk(BIOS_DEBUG, "SMM already finalized.\n");
-		return;
-	}
-	finalize_done = 1;
-
-#if CONFIG(SPI_FLASH_SMM)
-	/* Re-init SPI driver to handle locked BAR */
-	spi_init();
-#endif
-}
-
 /*
  * soc_legacy: A payload (Depthcharge) has indicated that the
  *   legacy payload (SeaBIOS) is being loaded. Switch devices that are
@@ -348,10 +332,6 @@
    	if (CONFIG(ELOG_GSMI))
    		southbridge_smi_gsmi();
    	break;
-	case APM_CNT_FINALIZE:
-		finalize();
-		break;
-
    case APM_CNT_LEGACY:
    	soc_legacy();
    	break;
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index fb6143e..55bef11 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -577,9 +577,6 @@
    	write32(spi + UVSCC, cfg.uvscc);
    	write32(spi + LVSCC, cfg.lvscc | VCL);
    }
-
-	printk(BIOS_DEBUG, "Finalizing SMM.\n");
-	outb(APM_CNT_FINALIZE, APM_CNT);
 }

BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, NULL);