Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36914 )
Change subject: binaryPI: implement C bootblock ......................................................................
Patch Set 21:
(4 comments)
https://review.coreboot.org/c/coreboot/+/36914/20/src/cpu/x86/lapic/Makefile... File src/cpu/x86/lapic/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/36914/20/src/cpu/x86/lapic/Makefile... PS20, Line 4: bootblock-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
The value rdstc() returns is scaled by 4. […]
Ack
https://review.coreboot.org/c/coreboot/+/36914/20/src/drivers/amd/agesa/boot... File src/drivers/amd/agesa/bootblock.c:
https://review.coreboot.org/c/coreboot/+/36914/20/src/drivers/amd/agesa/boot... PS20, Line 17: #include <northbridge/amd/agesa/agesa_helper.h>
amd_initmmio() is not really about agesa and would be better elsewhere.
This could be a static function here. Noticed MMIO configuration MSR is the same across all families as well as rom caching MTRR. The MTRR set as writeback for AGESA heap also seems to be the same with an exception that the size may be different (can be solved with Kconfig option)
https://review.coreboot.org/c/coreboot/+/36914/20/src/northbridge/amd/agesa/... File src/northbridge/amd/agesa/agesa_helper.h:
https://review.coreboot.org/c/coreboot/+/36914/20/src/northbridge/amd/agesa/... PS20, Line 66:
These will come from some amdblocks/ headerfile instead. Not really about AGESA.
Not anymore after your patches?
https://review.coreboot.org/c/coreboot/+/36914/20/src/northbridge/amd/pi/nb_... File src/northbridge/amd/pi/nb_util.c:
https://review.coreboot.org/c/coreboot/+/36914/20/src/northbridge/amd/pi/nb_... PS20, Line 19: void *get_ap_entry_ptr(void)
Make the code in stoney/nb_util.c available under SOC_AMD_COMMON instead of forking a copy.
Not needed anymore I guess