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Kapil Porwal has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/82136?usp=email )
Change subject: mb/google/brox: Fix CPU crashlog device MMIO memory access
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Patch Set 10:
(1 comment)
File src/soc/intel/alderlake/crashlog.c:
https://review.coreboot.org/c/coreboot/+/82136/comment/1db54344_be708bc3?usp... :
PS10, Line 205: &
Why bitwise `&`? Did you mean to use logical `&&` operator?
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