[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/xeon_sp: Refactor IOAT compiler optimization outs

[Paul Menzel (Code Review)]

Attention is currently required from: Shuo Liu.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80683?usp=email )

Change subject: soc/intel/xeon_sp: Refactor IOAT compiler optimization outs
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Patch Set 3:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/80683/comment/3f0b25b5_1b452cb1 :
PS3, Line 16: TEST=intel/archercity CRB
Is there a size and/or run-time difference? Please document that.

File src/soc/intel/xeon_sp/uncore_acpi.c:

https://review.coreboot.org/c/coreboot/+/80683/comment/b0504908_bd46208b :
PS3, Line 339: 	if (CONFIG(HAVE_IOAT_DOMAINS) && is_ioat_iio_stack_res(ri)) {
Is that pattern common in coreboot?