[coreboot-gerrit] Change in coreboot[master]: soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS'

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44548 )

Change subject: soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS'
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soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS'

This will remove the warning:
 "src/soc/intel/xeon_sp/cpx/Kconfig:79:warning: config symbol 'CPU_BCLK_MHZ' uses select, but is not boolean or tristate"

Change-Id: I2cfaf347b638e3847caa167e7efda89e9202960a
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44548
Tested-by: build bot (Jenkins) 
Reviewed-by: Benjamin Doron 
Reviewed-by: Nico Huber 
Reviewed-by: Patrick Rudolph 
Reviewed-by: Angel Pons 
Reviewed-by: Jonathan Zhang 
---
M src/soc/intel/xeon_sp/Kconfig
M src/soc/intel/xeon_sp/cpx/Kconfig
2 files changed, 1 insertion(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved
  Patrick Rudolph: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved
  Jonathan Zhang: Looks good to me, approved
  Benjamin Doron: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index cf9ba94..545b423 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -17,6 +17,7 @@
    bool
    select XEON_SP_COMMON_BASE
    select PLATFORM_USES_FSP2_2
+	select CACHE_MRC_SETTINGS
    help
      Intel Cooperlake-SP support

diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
index dcbadf8..8e7e6f1 100644
--- a/src/soc/intel/xeon_sp/cpx/Kconfig
+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
@@ -76,8 +76,6 @@
    int
    default 100

-select CACHE_MRC_SETTINGS
-
 # CPX-SP has 2 IMCs, 3 channels per IMC, 2 DIMMs per channel
 # Default value is set to one socket, full config.
 config DIMM_MAX