Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43782 )
Change subject: mb/google/zork: remove USB2 PHY tune defaults from devicetree ......................................................................
mb/google/zork: remove USB2 PHY tune defaults from devicetree
The previous commit makes sure that when the USB2 PHY tune values aren't provided in the devicetree the defaults in the UPD won't be overwritten with zeros when has_usb2_phy_tune_params is zero or unspecified.
Change-Id: I683a84f927a217de679b5cc030217272f05032cf Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb 2 files changed, 2 insertions(+), 158 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/43782/1
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 4a01a12..a751191 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -51,85 +51,7 @@
register "xhci0_force_gen1" = "0"
- register "has_usb2_phy_tune_params" = "1" - - # Controller0 Port0 Default - register "usb_2_port_0_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x03, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller0 Port1 Default - register "usb_2_port_1_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x03, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller0 Port2 Default - register "usb_2_port_2_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x03, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller0 Port3 Default - register "usb_2_port_3_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x03, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller1 Port0 Default - register "usb_2_port_4_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x02, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller1 Port1 Default - register "usb_2_port_5_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x02, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" + register "has_usb2_phy_tune_params" = "0"
# SPI Configuration register "common_config.spi_config" = "{ diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 986c444..fb7d8cb 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -51,85 +51,7 @@
register "xhci0_force_gen1" = "0"
- register "has_usb2_phy_tune_params" = "1" - - # Controller0 Port0 Default - register "usb_2_port_0_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x03, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller0 Port1 Default - register "usb_2_port_1_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x03, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller0 Port2 Default - register "usb_2_port_2_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x03, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller0 Port3 Default - register "usb_2_port_3_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x03, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x6, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller1 Port0 Default - register "usb_2_port_4_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x02, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" - - # Controller1 Port1 Default - register "usb_2_port_5_tune_params" = "{ - .com_pds_tune = 0x03, - .sq_rx_tune = 0x3, - .tx_fsls_tune = 0x3, - .tx_pre_emp_amp_tune = 0x02, - .tx_pre_emp_pulse_tune = 0x0, - .tx_rise_tune = 0x1, - .rx_vref_tune = 0x5, - .tx_hsxv_tune = 0x3, - .tx_res_tune = 0x01, - }" + register "has_usb2_phy_tune_params" = "0"
# SPI Configuration register "common_config.spi_config" = "{