Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48127 )
Change subject: mb/intel/ehlcrb: Add EHL CRB memory initialization support
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/48127/1/src/mainboard/intel/elkhart...
File src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c:
https://review.coreboot.org/c/coreboot/+/48127/1/src/mainboard/intel/elkhart...
PS1, Line 41: /* Baseboard Rcomp target values */
This comment does not add more information than the code already do. You could drop it without loss of information.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/48127
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ifd85caa9ac1c9baf443734eb17ad5683ee92ca3b
Gerrit-Change-Number: 48127
Gerrit-PatchSet: 1
Gerrit-Owner: Lean Sheng Tan
lean.sheng.tan@intel.com
Gerrit-Reviewer: Mario Scheithauer
mario.scheithauer@siemens.com
Gerrit-Reviewer: Martin Roth
martinroth@google.com
Gerrit-Reviewer: Maulik V Vaghela
maulik.v.vaghela@intel.com
Gerrit-Reviewer: Patrick Georgi
pgeorgi@google.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Subrata Banik
subrata.banik@intel.com
Gerrit-Reviewer: Werner Zeh
werner.zeh@siemens.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-Comment-Date: Wed, 02 Dec 2020 06:40:09 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment