[coreboot-gerrit] Change in ...coreboot[master]: [TESTME]soc/intel/fsp_baytrail: Select RELOCATABLE_RAMSTAGE

[Huang Jin (Code Review)]

Huang Jin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29910 )

Change subject: [TESTME]soc/intel/fsp_baytrail: Select RELOCATABLE_RAMSTAGE
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Patch Set 1:

Hey Arthur,

Thanks for saving Baytrail FSP ... Appreciate it. I'd like to test your change on a Baytrail board but I don't have one at the moment.

Please allow me some time to set it up. If someone else can verify the change, go ahead do so.

Thanks,
Aaron