Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47049 )
Change subject: mb/google/volteer: Skip TPM detection except on SPI ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47049/7/src/mainboard/google/voltee... File src/mainboard/google/volteer/mainboard.c:
https://review.coreboot.org/c/coreboot/+/47049/7/src/mainboard/google/voltee... PS7, Line 103: it will use long pulses by default, or use the interrupt line in : * a different way altogether
Which one is it? Is it tracked in some bug?
We have not decided yet. (I have not taken the time to study these particular requirements of the I2C TPM standard.) But any way we decide, we will not have old GSC firmware that need special handling in early ramstage, as we do with Cr50.
I have created b/172509545 to track this.