Hannah W has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35348 )
Change subject: Rangeley: Fix incorrect BCLK
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Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35348/10/src/cpu/intel/fsp_model_40...
File src/cpu/intel/fsp_model_406dx/acpi.c:
https://review.coreboot.org/c/coreboot/+/35348/10/src/cpu/intel/fsp_model_40...
PS10, Line 177:
I wonder if the value returned here is actually what we would want for tsc_freq_mhz(). […]
I don't see a tsc_freq_mhz inside cpu/intel/fsp_model_406dx/ or inside southbridge/intel/fsp_rangeley.
Maybe I should add a tsc_freq_mhz function inside cpu/intel/fsp_model_406dx/ with the old implementation as shown below but with BCLK fix
unsigned long tsc_freq_mhz(void)
{
msr_t msr = rdmsr(MSR_PLATFORM_INFO);
return (CONFIG_CPU_BCLK_MHZ * ((msr.lo >> 8) & 0xff));
}
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