Furquan Shaikh (furquan@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18111
-gerrit
commit 1b67c738904ebdcd325cecae692f0f5171034022 Author: Furquan Shaikh furquan@chromium.org Date: Wed Jan 11 20:32:55 2017 -0800
mainboard/google/poppy: Enable SD card
BUG=chrome-os-partner:60713 BRANCH=None TEST=sdcard is detected.
Change-Id: I9ec0cabff0ed7973f5e7dd2c1eae346ae6a1aa99 Signed-off-by: Furquan Shaikh furquan@chromium.org --- src/mainboard/google/poppy/devicetree.cb | 4 ++-- src/mainboard/google/poppy/gpio.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/google/poppy/devicetree.cb b/src/mainboard/google/poppy/devicetree.cb index 4283a34..fe70232 100644 --- a/src/mainboard/google/poppy/devicetree.cb +++ b/src/mainboard/google/poppy/devicetree.cb @@ -36,7 +36,7 @@ chip soc/intel/skylake register "Cio2Enable" = "0" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "0" + register "ScsSdCardEnabled" = "2" register "IshEnable" = "0" register "PttSwitch" = "0" register "InternalGfx" = "1" @@ -230,7 +230,7 @@ chip soc/intel/skylake device pci 1e.3 on end # GSPI #1 device pci 1e.4 on end # eMMC device pci 1e.5 off end # SDIO - device pci 1e.6 off end # SDCard + device pci 1e.6 on end # SDCard device pci 1f.0 on chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/poppy/gpio.h b/src/mainboard/google/poppy/gpio.h index bd92baf..914b8ed 100644 --- a/src/mainboard/google/poppy/gpio.h +++ b/src/mainboard/google/poppy/gpio.h @@ -57,8 +57,8 @@ static const struct pad_config gpio_table[] = { /* SUSWARN# */ PAD_CFG_NC(GPP_A13), /* ESPI_RESET# */ /* SUSACK# */ PAD_CFG_NF(GPP_A15, NONE, DEEP, NF1), -/* SD_1P8_SEL */ PAD_CFG_NC(GPP_A16), -/* SD_PWR_EN# */ PAD_CFG_NC(GPP_A17), +/* SD_1P8_SEL */ PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), +/* SD_PWR_EN# */ PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1), /* ISH_GP0 */ PAD_CFG_NC(GPP_A18), /* ISH_GP1 */ PAD_CFG_NC(GPP_A19), /* ISH_GP2 */ PAD_CFG_GPI_APIC(GPP_A20, NONE,