[coreboot-gerrit] Change in coreboot[master]: soc/intel/skl: mark C-state C2 as insupported in FADT

[Michael Niewöhner (Code Review)]

Attention is currently required from:  Felix Singer, Nico Huber, Furquan Shaikh, Paul Menzel, Angel Pons, Subrata Banik, Patrick Rudolph.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58079 )

Change subject: soc/intel/skl: mark C-state C2 as insupported in FADT
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/58079/comment/39068798_f3e817dc 
PS2, Line 10: unsupported in the FADT.
> hmm, looks like only a few cpus in src/cpu/intel still configure P_BLK. […]

ah, but I guess I can do in `src/cpu/intel/speedstep/acpi.c` what Angel did in commit 772c09739 and drop the fadt fields duty_offset, duty_width, p_lvl2_lat. Not sure about p_lvl3_lat, since C3 is supported at least on SKL