build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33152 )
Change subject: src/soc/intel: Fix Coverity scan report ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/#/c/33152/1/src/soc/intel/broadwell/romstage/ram... File src/soc/intel/broadwell/romstage/raminit.c:
https://review.coreboot.org/#/c/33152/1/src/soc/intel/broadwell/romstage/ram... PS1, Line 125: trailing whitespace
https://review.coreboot.org/#/c/33152/1/src/soc/intel/broadwell/romstage/ram... PS1, Line 128: trailing whitespace
https://review.coreboot.org/#/c/33152/1/src/soc/intel/broadwell/romstage/ram... PS1, Line 128: please, no spaces at the start of a line