Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41855 )
Change subject: soc/intel/common: add TCC activation functionality ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41855/9/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/cpulib.c:
https://review.coreboot.org/c/coreboot/+/41855/9/src/soc/intel/common/block/... PS9, Line 271: msr = rdmsr(MSR_TEMPERATURE_TARGET); : /* Time Window Tau Bits [6:0] */ : msr.lo &= ~0x7f; : msr.lo |= 0xe6; /* setting 100ms thermal time window */ : wrmsr(MSR_TEMPERATURE_TARGET, msr); This patch breaks all Siemens APL mainboards. This part was not executed in the old function. The Default value after reboot for MSR_TEMPERATURE_TARGET is 0x006e0000. Everything works fine with this setting. But now also Bits 15:8 will be changed (Fan Temperature Target Offset). Our boards do not have a fan. Is it possible for APL to query whether a fan is present and only then execute the code?