[coreboot-gerrit] Change in coreboot[master]: [TEST-ONLY] Distinguish SKU1 and 2 for eMMC and SSD respectively

[Peichao Li (Code Review)]

Peichao Li has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35204 )

Change subject: [TEST-ONLY] Distinguish SKU1 and 2 for eMMC and SSD respectively
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Patch Set 4:
> Patch Set 4:
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> > > Patch Set 4:
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> > > > > > > Patch Set 3:
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> > > > > > > May I consult what is bad thing for enabling eMMC and SSD controller always? Thanks.
> > > > > >
> > > > > > Dear Marco, if enable both MDIO and PCI-E controller, DUT may encounter interrupt storm since have relevant GPIOs(MDIO or PCI-E) not be closed.
> > > > >
> > > > > Then for the discussion of SKU ID 255 to support both storage, we will have this interrupt storm issue? Where is the interrupt storm came from? Sorry, if you discussed it then please just point me to the issue, thanks.
> > > >
> > > > I am actually interested in knowing the answer to this. What is the interrupt storm that you are referring to here. I was under the impression that the controllers are being disabled for power or S0ix related reasons. I would really like to see an analysis of why GPIOs/controllers need to be configured differently between eMMC and SSD.
> > >
> > > I thought it was power as well.  If the controllers are disabled, why are the interrupts enabled?
> >
> > Dear Marco Furquan Tim,
> >
> > I need clarify interrupt is one of side effects. 
> > As I know 1. correct SKU ID must point to correct GPIO configuration, if not, will lead to side effects include interrupt storm.
> > 2. Why will impact S0ix if don't close these relevant GPIOs. As I know if no device attach to the platform, relevant device can't respond system request when enter S0ix, so block system enter S0ix. for example PCI-E device need enable ASPM(L1.1 or L1.2) and if no relevant PCI-E device on platform, which will block system enter S0ix. 
> > 3. as I know if controller are disabled, need close relevant GPIOs(generally configure IO is GPI and Hi-Z), If not, these GPIOs may be impacted by external electromagnetic environment.
>
> Dear Sirs,
>
> So if I am wrong, please correct me. Thanks you very much!
>
> Best regards

sorry correct: I need clarify interrupt is one of side effects.
the interrupt actually point to interrupt storm.