Timothy Pearson (tpearson@raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11975
-gerrit
commit 3015e0ec1ecaf88ba1a934c8122a5ebb695e2d2e Author: Timothy Pearson tpearson@raptorengineeringinc.com Date: Thu Jun 4 00:10:03 2015 -0500
amd/amdmct/mct_ddr3: Improve SPD DIMM detect reliability
Change-Id: Ifab63eca2233c63a6a42ab8b7e742f8e47fb2a09 Signed-off-by: Timothy Pearson tpearson@raptorengineeringinc.com --- src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index b79b6c9..771d743 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -3654,6 +3654,7 @@ static u8 DIMMPresence_D(struct MCTStatStruc *pMCTstat, u8 devwidth; u16 DimmSlots; u8 byte = 0, bytex; + uint8_t crc_status;
/* preload data structure with addrs */ mctGet_DIMMAddr(pDCTstat, pDCTstat->Node_ID); @@ -3674,10 +3675,20 @@ static u8 DIMMPresence_D(struct MCTStatStruc *pMCTstat, int status; smbaddr = Get_DIMMAddress_D(pDCTstat, i); status = mctRead_SPD(smbaddr, SPD_ByteUse); + if (status >= 0) { + /* Verify result */ + status = mctRead_SPD(smbaddr, SPD_ByteUse); + } if (status >= 0) { /* SPD access is ok */ pDCTstat->DIMMPresent |= 1 << i; read_spd_bytes(pMCTstat, pDCTstat, i); - if (crcCheck(pDCTstat, i)) { /* CRC is OK */ + crc_status = crcCheck(pDCTstat, i); + if (!crc_status) { + /* Try again in case there was a transient glitch */ + read_spd_bytes(pMCTstat, pDCTstat, i); + crc_status = crcCheck(pDCTstat, i); + } + if (crc_status) { /* CRC is OK */ byte = pDCTstat->spd_data.spd_bytes[i][SPD_TYPE]; if (byte == JED_DDR3SDRAM) { /*Dimm is 'Present'*/