Johnny Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ramstage.c 3 files changed, 45 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/1
diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig index 9dbc066..9a9c3f0 100644 --- a/src/mainboard/ocp/tiogapass/Kconfig +++ b/src/mainboard/ocp/tiogapass/Kconfig @@ -23,6 +23,7 @@ select MAINBOARD_USES_FSP2_0 select FSP_CAR select IPMI_KCS + select VPD
config MAINBOARD_DIR string diff --git a/src/mainboard/ocp/tiogapass/board.fmd b/src/mainboard/ocp/tiogapass/board.fmd index 1e3fda7..83a110a 100644 --- a/src/mainboard/ocp/tiogapass/board.fmd +++ b/src/mainboard/ocp/tiogapass/board.fmd @@ -6,6 +6,8 @@ } SI_BIOS@0x1000000 0x1000000 { FMAP@0x0 0x800 - COREBOOT(CBFS)@0x800 0xfff800 + RO_VPD@0x800 0x4000 + RW_VPD@0x4800 0x4000 + COREBOOT(CBFS)@0x8800 0xff7800 } } diff --git a/src/mainboard/ocp/tiogapass/ramstage.c b/src/mainboard/ocp/tiogapass/ramstage.c index 639874b..8e1123c 100644 --- a/src/mainboard/ocp/tiogapass/ramstage.c +++ b/src/mainboard/ocp/tiogapass/ramstage.c @@ -15,16 +15,57 @@ #include <soc/ramstage.h> #include <pc80/mc146818rtc.h> #include <cf9_reset.h> +#include <drivers/vpd/vpd.h> +#include <console/console.h> +#include <drivers/ipmi/ipmi_ops.h> +#include <string.h> #include "ipmi.h" +/* VPD variable for enabling/disabling FRB2 timer. */ +#define FRB2_TIMER "FRB2_TIMER" +/* VPD variable for setting FRB2 timer countdown value. */ +#define FRB2_COUNTDOWN "FRB2_COUNTDOWN" +#define VPD_LEN 10 +/* Default countdown is 15 minutes. */ +#define DEFAULT_COUNTDOWN 9000
void mainboard_silicon_init_params(FSPS_UPD *params) { }
+static void init_frb2_wdt(void) +{ + + char val[VPD_LEN]; + /* Enable FRB2 timer by default. */ + u8 enable = 1; + uint16_t countdown; + + if (vpd_get_bool(FRB2_TIMER, VPD_RW, &enable)) { + if (!enable) { + printk(BIOS_DEBUG, "Disable FRB2 timer\n"); + ipmi_stop_bmc_wdt(BMC_KCS_BASE); + } + } + if (enable) { + if (vpd_gets(FRB2_COUNTDOWN, val, VPD_LEN, VPD_RW)) { + countdown = (uint16_t)atol(val); + printk(BIOS_DEBUG, "FRB2 timer countdown set to: %d\n", + countdown); + } else { + printk(BIOS_DEBUG, "FRB2 timer use default value: %d\n", + DEFAULT_COUNTDOWN); + countdown = DEFAULT_COUNTDOWN; + } + ipmi_init_and_start_bmc_wdt(BMC_KCS_BASE, countdown, + TIMEOUT_HARD_RESET); + } +} + static void mainboard_enable(struct device *dev) { ipmi_oem_rsp_t rsp;
+ init_frb2_wdt(); if (is_ipmi_clear_cmos_set(&rsp)) { cmos_init(1); clear_ipmi_flags(&rsp);