[coreboot-gerrit] Change in coreboot[master]: mb/google/zork/var/vliboz: Add LTE_RST power sequence

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47912 )

Change subject: mb/google/zork/var/vliboz: Add LTE_RST power sequence
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mb/google/zork/var/vliboz: Add LTE_RST power sequence

Latest HW schematic add LTE_RST pin to control module power sequence.

BUG=b:173490220
BRANCH=zork
TEST=measure the waveform is meet the LTE module spec.

Signed-off-by: Eric Lai 
Change-Id: I0f0a35a905d711dd8d17dea2ae82a8dfa1fa05ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47912
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
---
M src/mainboard/google/zork/variants/vilboz/gpio.c
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c
index 6fba0e2..c6ef161 100644
--- a/src/mainboard/google/zork/variants/vilboz/gpio.c
+++ b/src/mainboard/google/zork/variants/vilboz/gpio.c
@@ -19,6 +19,8 @@
 static const struct soc_amd_gpio vilboz_gpio_set_stage_ram[] = {
    /* P sensor INT */
    PAD_INT(GPIO_40, PULL_NONE, LEVEL_LOW, STATUS_DELIVERY),
+	/* LTE_RST_L */
+	PAD_GPO(GPIO_89, HIGH),
 };

const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)