[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40004 )

Change subject: soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type
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soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type

TCSS TBT PCIE root ports scope type was mistakenly set to PCI_ENDPOINT.
Fix the scope type to be PCI_SUB.

BUG=b:141609884
TEST=Booted to kernel and verified no TBT PCIE root ports scope
type mismatch error in kernel log.

Change-Id: I844e7e9583992be496223fb51f24c5aa24fc7d21
Signed-off-by: John Zhao 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40004
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Tim Wawrzynczak 
---
M src/soc/intel/tigerlake/acpi.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c
index 9e7ff56..36c488b 100644
--- a/src/soc/intel/tigerlake/acpi.c
+++ b/src/soc/intel/tigerlake/acpi.c
@@ -235,7 +235,7 @@
    		unsigned long tmp = current;

current += acpi_create_dmar_drhd(current, 0, 0, tbtbar);
-			current += acpi_create_dmar_ds_pci(current, 0, 7, i);
+			current += acpi_create_dmar_ds_pci_br(current, 0, 7, i);

acpi_dmar_drhd_fixup(tmp, current);
    	}