[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/xeon_sp/spr: Use common codeflow for MP init in spr

[Shelly Chang (Code Review)]

Shelly Chang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73376 )

Change subject: soc/intel/xeon_sp/spr: Use common codeflow for MP init in spr
......................................................................

soc/intel/xeon_sp/spr: Use common codeflow for MP init in spr

Align CB:72604 and remove lapic from chipset.cb.

Signed-off-by: Shelly Chang 
Change-Id: I1f0ddab09a5d099f8dbd417cbbcd11660aad1644
---
M src/soc/intel/xeon_sp/spr/chip.c
M src/soc/intel/xeon_sp/spr/chipset.cb
M src/soc/intel/xeon_sp/spr/cpu.c
3 files changed, 17 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/73376/1

diff --git a/src/soc/intel/xeon_sp/spr/chip.c b/src/soc/intel/xeon_sp/spr/chip.c
index 77e520b..5ebaf81 100644
--- a/src/soc/intel/xeon_sp/spr/chip.c
+++ b/src/soc/intel/xeon_sp/spr/chip.c
@@ -60,7 +60,7 @@
 static struct device_operations cpu_bus_ops = {
    .read_resources = noop_read_resources,
    .set_resources = noop_set_resources,
-	.init = spr_init_cpus,
+	.init = mp_cpu_bus_init,
    .acpi_fill_ssdt = generate_cpu_entries,
 };

diff --git a/src/soc/intel/xeon_sp/spr/chipset.cb b/src/soc/intel/xeon_sp/spr/chipset.cb
index efc8637..9a913d9 100644
--- a/src/soc/intel/xeon_sp/spr/chipset.cb
+++ b/src/soc/intel/xeon_sp/spr/chipset.cb
@@ -32,9 +32,7 @@
    register "gen2_dec" = "0x000c0ca1" # IPMI KCS

register "cstate_states" = "CSTATES_C1C6"
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
+	device cpu_cluster 0 on end
    device domain 0 on
    	device pci 00.0 on end # Intel device 09a2: Memory Map/Intel VT-d
    	device pci 00.1 on end # Intel device 09a4: Mesh to IAL
diff --git a/src/soc/intel/xeon_sp/spr/cpu.c b/src/soc/intel/xeon_sp/spr/cpu.c
index 219bd57..ed973db 100644
--- a/src/soc/intel/xeon_sp/spr/cpu.c
+++ b/src/soc/intel/xeon_sp/spr/cpu.c
@@ -258,13 +258,13 @@
    .post_mp_init = post_mp_init,
 };

-void spr_init_cpus(struct device *dev)
+void mp_init_cpus(struct bus *bus)
 {
    /*
     * chip_config is used in cpu device callback. Other than cpu 0,
     * rest of the CPU devices do not have chip_info updated.
     */
-	chip_config = dev->chip_info;
+	chip_config = bus->dev->chip_info;

microcode_patch = intel_microcode_find();

@@ -273,7 +273,7 @@

intel_microcode_load_unlocked(microcode_patch);

-	if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)
+	if (mp_init_with_smm(bus, &mp_ops) < 0)
    	printk(BIOS_ERR, "MP initialization failure.\n");

/* update numa domain for all cpu devices */