Marc Jones (marc.jones@se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8595
-gerrit
commit b1819317e6feb595c8208983b546dad727aa4ce3 Author: Aaron Durbin adurbin@chromium.org Date: Tue Jul 15 10:25:48 2014 -0500
arm64: provide early SoC initialization
Some of the SoC's need an early hook to configure certain registers. One example of this is on t132 where ramstage is the first thing being ran on the arm64 core and it is the only entity that can configure certain registers required for the rest of ramstage. Therefore, provide the opportunity for the SoC to implement such requirements.
BUG=chrome-os-partner:30572 BRANCH=None TEST=Built and ran through coreboot.
Original-Change-Id: Ib352f3788872f888581b398c9b394b7c4e54b02a Original-Signed-off-by: Aaron Durbin adurbin@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/208061 Original-Reviewed-by: Tom Warren twarren@nvidia.com Original-Reviewed-by: Furquan Shaikh furquan@chromium.org Original-Commit-Queue: Furquan Shaikh furquan@chromium.org (cherry picked from commit 2c50e2b39e75d1383e8e573c576630a5b7313349) Signed-off-by: Marc Jones marc.jones@se-eng.com
Change-Id: I38df63e46c5c21b2d319fc9eb42053c3a0d61bc8 --- src/arch/arm64/Makefile.inc | 5 +++++ src/arch/arm64/c_entry.c | 31 +++++++++++++++++++++++++++++++ src/arch/arm64/include/arch/stages.h | 8 ++++++++ src/arch/arm64/stage_entry.S | 2 +- 4 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index 6af675b..64557c1 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -57,6 +57,8 @@ bootblock-y += div0.c bootblock-y += id.S $(obj)/arch/arm64/id.bootblock.o: $(obj)/build.h
+bootblock-y += c_entry.c +bootblock-y += stage_entry.S bootblock-y += stages.c bootblock-y += eabi_compat.c bootblock-y += ../../lib/memset.c @@ -77,6 +79,8 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM64
ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y)
+romstage-y += c_entry.c +romstage-y += stage_entry.S romstage-y += stages.c romstage-y += div0.c romstage-y += eabi_compat.c @@ -100,6 +104,7 @@ endif # CONFIG_ARCH_ROMSTAGE_ARM64
ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM64),y)
+ramstage-y += c_entry.c ramstage-y += stages.c ramstage-y += div0.c ramstage-y += cpu.c diff --git a/src/arch/arm64/c_entry.c b/src/arch/arm64/c_entry.c new file mode 100644 index 0000000..a4d4b0c --- /dev/null +++ b/src/arch/arm64/c_entry.c @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/stages.h> + +void __attribute__((weak)) arm64_soc_init(void) +{ + /* Default weak implementation does nothing. */ +} + +void arm64_init(void) +{ + arm64_soc_init(); + main(); +} diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h index 0f82450..9771492 100644 --- a/src/arch/arm64/include/arch/stages.h +++ b/src/arch/arm64/include/arch/stages.h @@ -26,4 +26,12 @@ void stage_entry(void); void stage_exit(void *); void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size);
+/* C entry point for all arm64 stages. */ +void arm64_init(void); + +/* This function is called upon initial entry of each stage. It is called prior + * to main(). That means all of the common infrastructure will most likely not + * be available to be used (such as console). */ +void arm64_soc_init(void); + #endif diff --git a/src/arch/arm64/stage_entry.S b/src/arch/arm64/stage_entry.S index 8e57706..0f49c40 100644 --- a/src/arch/arm64/stage_entry.S +++ b/src/arch/arm64/stage_entry.S @@ -61,7 +61,7 @@ ENTRY(arm64_el3_startup) .stack: .quad _estack .entry: - .quad main + .quad arm64_init ENDPROC(arm64_el3_startup) .global arm64_el3_startup_end arm64_el3_startup_end: