Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48286 )
Change subject: src/soc/intel: Add support for CAR_HAS_SF_MASKS and select for TGL
......................................................................
Patch Set 6:
I think this modified NEM entry sequence looks good, but I think we should also make the additions to the NEM teardown too:
"Set IA32_CR_PQR_ASSOC (MSR C8Fh) bits [32:33] to 00b and restore IA32_L3_MASK_1/2 and
IA32_L3_SF_MASK_1/2 to their reset default values."
--
To view, visit
https://review.coreboot.org/c/coreboot/+/48286
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iabf7f387fb5887aca10158788599452c3f2df7e8
Gerrit-Change-Number: 48286
Gerrit-PatchSet: 6
Gerrit-Owner: Shreesh Chhabbi
shreesh.chhabbi@intel.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Shreesh Chhabbi
shreesh.chhabbi@intel.corp-partner.google.com
Gerrit-Reviewer: Tim Wawrzynczak
twawrzynczak@chromium.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Furquan Shaikh
furquan@google.com
Gerrit-Comment-Date: Fri, 04 Dec 2020 21:46:41 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment