[coreboot-gerrit] Change in coreboot[master]: mb/intel/ehlcrb: Update FIVR configs

[Lean Sheng Tan (Code Review)]

Attention is currently required from: Maulik V Vaghela, Mario Scheithauer, Subrata Banik, Lean Sheng Tan, Werner Zeh.
Hello build bot (Jenkins), Maulik V Vaghela, Mario Scheithauer, Angel Pons, Subrata Banik, Werner Zeh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/55981

to look at the new patch set (#3).

Change subject: mb/intel/ehlcrb: Update FIVR configs
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mb/intel/ehlcrb: Update FIVR configs

This patch sets the optimized FIVR configs for ehlcrb customized
based on the performance  measurements to achieve the better power
savings in sleep states.
- Enable the external V1p05, Vnn, VnnSx rails in S0i3, S3, S4, S5
  states.
- Update the supported voltage states.
- Update max supported current, voltage transition time and RFI
  spread spectrum.

Signed-off-by: Lean Sheng Tan 
Change-Id: I1e30ff6d84bfe078fcce0f968fce6aaab7fd575b
---
M src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
1 file changed, 16 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/55981/3