Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33993 )
Change subject: mainboard/amd: Add padmelon board code ......................................................................
Patch Set 16:
(12 comments)
re
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... File src/mainboard/amd/padmelon/Kconfig:
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 18: config HAVE_S3_SUPPORT
Will do.
Done
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 22: Select it to change GPIO used for wake.
Correct, will remove the help.
Done
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 64: config HWM_PORT
Will do.
It needs to be a config with this name... fintek code requires this to be defined.
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 68: HWM
Will do.
Done
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... File src/mainboard/amd/padmelon/acpi/superio.asl:
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 49: #define SUPERIO_PNP_BASE 0x4E
Will check
Ack
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 52: Device(SUPERIO_DEV) {
True, the whole file should be there. Will move.
Done, whole file removed as there's a newer one under superio/fintek/f81803a
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... File src/mainboard/amd/padmelon/board_info.txt:
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 2:
Will have to verify. Will try.
Done
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... File src/mainboard/amd/padmelon/bootblock/OemCustomize.c:
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 140: AzaliaCodecAlc286Table
Not sure, copy from Marc's code. Will double check.
Correct one is ALC662 adding appropriate hda_ver.c and changing Kconfig.
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... File src/mainboard/amd/padmelon/bootblock/bootblock.c:
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 35: /* Remove this section if HW handshake is not needed */
They are needed for those who don't have a modified serial cable (connecting DCD to DTR and DSR, plu […]
Done
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... File src/mainboard/amd/padmelon/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 70: 0x4E
Will check best way.
0x4e is not defined anywhere else, except at devicetree.cb. There's also no header file where I could easely define it, would need to create one... Would that be acceptable?
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 73: #include <superio/fintek/f81803a/acpi/superio.asl>
Will do.
Done
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... File src/mainboard/amd/padmelon/romstage.c:
https://review.coreboot.org/c/coreboot/+/33993/15/src/mainboard/amd/padmelon... PS15, Line 4: * Copyright (C) 2015 Advanced Micro Devices, Inc. : * :
This is a placeholder, if there ever is something platform specific to add to romstage. […]
Done