[coreboot-gerrit] Change in ...coreboot[master]: src/soc/intel/braswell/chip.c: Configure LPSS devices in correct mode

[Matt DeVillier (Code Review)]

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29284 )

Change subject: src/soc/intel/braswell/chip.c: Configure LPSS devices in correct mode
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Patch Set 3:

is the default PCI mode? (since you're not explicitly setting it)
what are the consequences of not passing the correct mode to FSP?