Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57290 )
Change subject: mb/google/brya/variants: fix override values for power limits ......................................................................
mb/google/brya/variants: fix override values for power limits
There are two different types of 682 SKU available with TDP of 28W and 45W. This patch fix override values for power limits for these 682 SKU. This patch also sets power limit values dynamically based on machine ID and CPU TDP of SKU.
BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 board
Change-Id: I796e56321ae9c8312530a4b8986cd73a2245f5fa Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/57290 Reviewed-by: EricR Lai ericr_lai@compal.corp-partner.google.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/brya/variants/baseboard/brya/ramstage.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/brya/variants/brya0/ramstage.c 3 files changed, 9 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified EricR Lai: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c b/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c index d329f43..46e73a5 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c +++ b/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c @@ -30,8 +30,10 @@
uint16_t mchid = pci_s_read_config16(PCI_DEV(0, 0, 0), PCI_DEVICE_ID);
+ u8 tdp = get_cpu_tdp(); + for (size_t i = 0; i < num_entries; i++) { - if (mchid == limits[i].mchid) { + if (mchid == limits[i].mchid && tdp == limits[i].cpu_tdp) { struct dptf_power_limits *settings = &config->controls.power_limits; config_t *conf = config_of_soc(); struct soc_power_limits_config *soc_config = conf->power_limits_config; diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h index 62d8094..e88d0f9 100644 --- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h @@ -27,6 +27,7 @@
struct cpu_power_limits { uint16_t mchid; + u8 cpu_tdp; unsigned int pl1_min_power; unsigned int pl1_max_power; unsigned int pl2_min_power; diff --git a/src/mainboard/google/brya/variants/brya0/ramstage.c b/src/mainboard/google/brya/variants/brya0/ramstage.c index d1f399f..cfb9662 100644 --- a/src/mainboard/google/brya/variants/brya0/ramstage.c +++ b/src/mainboard/google/brya/variants/brya0/ramstage.c @@ -4,11 +4,12 @@ #include <device/pci_ids.h>
const struct cpu_power_limits limits[] = { - /* SKU_ID, pl1_min, pl1_max, pl2_min, pl2_max, pl4 */ + /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */ /* All values are for baseline config as per bug:191906315 comment #10 */ - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 3000, 15000, 39000, 39000, 100000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 4000, 28000, 43000, 43000, 105000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 5000, 45000, 80000, 80000, 159000 }, + { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 39000, 39000, 100000 }, + { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 43000, 43000, 105000 }, + { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 43000, 43000, 105000 }, + { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 80000, 80000, 159000 }, };
void variant_devtree_update(void)