[coreboot-gerrit] Change in coreboot[master]: intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35233 )

Change subject: intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK
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Patch Set 1:
> Patch Set 1:
> > Patch Set 1:
> >
> > Subrata, can you take over this one and have the allocations match with the specs like Furguan suggests?
>
> It causes hang inside FSP (during FSP-M init) in both CNL/ICL where earlier DACHE_BSP_STACK_SIZE was 0x20000 (~128KB)

Not surprised. Like Furquan commented, we probably still need some increase for DCACHE_BSP_STACK_SIZE but did not find what the correct value would be. Also it has not been documented if (the ill-named) StackBase has to be aligned to StackSize in UPD.