[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Check TBT & TCSS ports for wake events

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47396 )

Change subject: soc/intel/tigerlake: Check TBT & TCSS ports for wake events
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47396/1/src/soc/intel/tigerlake/elo... 
File src/soc/intel/tigerlake/elog.c:

https://review.coreboot.org/c/coreboot/+/47396/1/src/soc/intel/tigerlake/elo... 
PS1, Line 86: SA_DEVFN_TCSS_XHCI
Do we care about printing the port # just like it is done for PCH_DEVFN_XHCI?