Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48223 )
Change subject: mb/google/volteer: ACPI nodes for volteer2_ti50 ......................................................................
Patch Set 3:
(2 comments)
Thanks for the thorough review.
https://review.coreboot.org/c/coreboot/+/48223/3/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/volteer2/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/48223/3/src/mainboard/google/voltee... PS3, Line 205: GOOG0005
Ah okay. Makes sense.
I copied this ID from some other ChromeOS model, with Cr50.
Currently, the Ti50 firmware uses the same non-standard I2C protocol as cr50 does (at the time we added I2C support to cr50, there was a standard only for SPI).
Long term, we want to modify Ti50 to adhere to the subsequently published standard for I2C TPM communication. At that point, we likely want to change the ID here, so that the kernel can know to use a different protocol.
For now, I think we want to keep the Cr50 ID, we do not want to introduce a new ID, to be used only temporarily.
https://review.coreboot.org/c/coreboot/+/48223/3/src/mainboard/google/voltee... PS3, Line 207: off
Ya we are down to ~15 free bits in the program fw_config, but we also have this unused 4-bit field f […]
The messy code will run only for the volteer2_ti50 variant (we could further move it to a file with suffix _ti50, if we want), so I am not too worried that keeping it will get in the way of other development.