Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37721 )
Change subject: soc/amd/common: Correct SPI FIFO size check ......................................................................
soc/amd/common: Correct SPI FIFO size check
When checking that command and data fit in the FIFO, don't count the first byte. The command doesn't go through the FIFO.
TEST=confirm error (4+68>71) goes away on Mandolin BUG=b:146225550
Change-Id: Ica2ca514deea401c9c5396913087e07a12ab3cf3 Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/common/block/spi/fch_spi_flash.c 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/37721/1
diff --git a/src/soc/amd/common/block/spi/fch_spi_flash.c b/src/soc/amd/common/block/spi/fch_spi_flash.c index 72bc5d6..93b8a14 100644 --- a/src/soc/amd/common/block/spi/fch_spi_flash.c +++ b/src/soc/amd/common/block/spi/fch_spi_flash.c @@ -39,7 +39,8 @@ int ret; u8 buff[SPI_FIFO_DEPTH + 1];
- if ((cmd_len + data_len) > SPI_FIFO_DEPTH) + /* Ensure FIFO is large enough. First byte of command does not go in the FIFO. */ + if ((cmd_len - 1 + data_len) > SPI_FIFO_DEPTH) return -1; memcpy(buff, cmd, cmd_len); memcpy(buff + cmd_len, data, data_len);