[coreboot-gerrit] Change in coreboot[master]: cpu/intel: add PC10 residency counter MSR

[Lance Zhao (Code Review)]

Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49044 )

Change subject: cpu/intel: add PC10 residency counter MSR
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Patch Set 2:
> Patch Set 2:
> > Patch Set 2: Code-Review+2
> >
> > The PC10 residency MSR is not generic,it will not apply for generation before glodmont, and start from 4th gene in core. Also not supported yet in xeon yet. But the implemented here seems okay.
>
> Oh, I missed that :S For Xeons, can it be read though (and return 0) or do we need to guard it?

Will return 0, so no need to guard at all.