Attention is currently required from: Patrick Rudolph.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78226?usp=email )
The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: sb/intel/bd82x6x: Disable unused PCIe root ports ......................................................................
Patch Set 2:
(1 comment)
File src/southbridge/intel/bd82x6x/pch.c:
https://review.coreboot.org/c/coreboot/+/78226/comment/04c2db34_48d482c6 : PS2, Line 309: pci_or_config16(dev, cap + PCI_EXP_FLAGS, PCI_EXP_FLAGS_SLOT); (I failed to copy-paste this correctly with previous review score)
If the downstream PCIe device is an integrated device, Slot Implemented should stay cleared, but we may not have the necessary information in static devicetree to take this into account. I think it would be worth adding a comment on this and also mention this in the commit message. There should be no need to assign SLOTCAP fields like power limits or PSN for integrated devices, but appears we have done it like that all the time without noticeable issues.
Setting FLAGS_SLOT=1, also integrated devices will use a "physical layer detection" mechanism to report the presence. I believe such mechanism is output from the PCIe PHY receiver sensing RX pair, so using this might be fine. If we get reports that integrated PCIe endpoints start to disappear, it's at least logged here already.
With FLAGS_SLOT==0, these PCH roortports always return PCI_EXP_SLTSTA_PDS=1.