[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add GPIO PM configuration into NVS

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37793 )

Change subject: soc/intel/common: Add GPIO PM configuration into NVS
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/37793/1/src/soc/intel/common/block/... 
File src/soc/intel/common/block/include/intelblocks/nvs.h:

https://review.coreboot.org/c/coreboot/+/37793/1/src/soc/intel/common/block/... 
PS1, Line 43: 	u8	gpmv[TOTAL_GPIO_COMM]; /* 0x31 - GPIO PM Value */
            : 	u8	unused[202];
> Doesn't the 202 depend on how each SoC defines TOTAL_GPIO_COMM ?

this is true, right now CNL (CML), ICL, TGL and JSL we have visibility of 5 GPIO communitym hence TOTAL_GPIO_COMM is 5.

Are you suggesting to have some buffer so we are not running into issue further ? like a reserve_gpio_comm[10] more ?