[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel: Fix slp-s0 residency counter frequency LPIT table

[Subrata Banik (Code Review)]

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Lance Zhao, Sukumar Ghorai, Tarun, Tim Wawrzynczak.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78164?usp=email )

Change subject: soc/intel: Fix slp-s0 residency counter frequency LPIT table
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Patch Set 7:

(1 comment)

File src/include/acpi/acpi.h:

https://review.coreboot.org/c/coreboot/+/78164/comment/79ad541d_73b7d42a :
PS7, Line 456: #if CONFIG(ACPI_SOC_INTEL_SLP_S0_FREQ_VALUE)
nit:

```
#if CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ_VALUE != 0
#define ACPI_LPIT_CTR_FREQ_TSC CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ
#else
#define ACPI_LPIT_CTR_FREQ_TSC 0
#endif
```

or

just replace ACPI_LPIT_CTR_FREQ_TSC macro in the code (sys_counter->counter_frequency) with CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ directly then you don't need this preprocessoring